This invention relates to a method of exposing printed wiring boards, such as multilayer printed wiring boards, which comprise, in addition to circuit patterns formed on plane surfaces, circuit patterns extending through through-holes so as to connect the planar circuit patterns with each other.
In the case of multilayer printed circuit or wiring boards, the circuit patterns formed on planar surfaces of the boards are connected via circuit patterns extending through through-holes formed in the boards. Such circuit patterns, which include patterns extending through through-holes as well as patterns formed on planar surfaces of the boards, may be formed by means of the photolithography method utilizing masks.
FIG. 1 shows a vertical section of a device for exposing printed wiring boards having through-holes, which device is disclosed in a recent article by A. Hoshino et al.: Mitsubishi Denki Giho [Technical Reports of Mitsubishi Electric Corporation], vol. 63. No. 2, 1989, pp. 75 through 78. In the figure, substrate 1 of a printed wiring board having a plurality of through holes 2 is covered by a negative type photoresist 3 formed on the substrate 1 by the electro-deposition method. It is noted that the resist 3 covers the wall surfaces of the through holes 2 as well as the plane surfaces of the substrate 1. Mask films 4, having patterns corresponding to the circuit patterns, are disposed on both main planar surfaces of the substrate 1. Each one of the two units of the exposing device, disposed above and below the substrate 1, comprises a lamp 5 for exposure, a reflector mirror 6, and a slit 7, and emits ultraviolet light 8 diverging by an angle .theta. with respect to the central optical axis of the lamp 5 normal to the main plane surfaces of the substrate 1. The exposing device, or the substrate 1, is translated in the direction A during the exposure.
The resist pattern corresponding to the desired circuit pattern is formed on the substrate 1 as follows. First, all the surfaces of the substrate 1 having through holes 2 are covered by resist 3 by means, for example, of the electrodeposition method. Then, the mask films 4 are disposed on the plane surfaces of the substrate 1, so that the resist 3 is exposed to the ultraviolet light 8 which is selectively transmitted through the mask films 4. Thereafter, the substrate 1 is exposed by means of the exposing device as shown in FIG. 1, wherein the exposing device or the substrate 1 is translated in the direction A, while the divergence angle .theta. of the ultraviolet light 8 is defined by the slit 7. Thus, the portions of the resist 3 on the plane surfaces of the substrate 1 corresponding to the circuit patterns that are to be formed thereon are selectively exposed; in addition, the whole wall surface areas of the resist 3 within the through holes 2 of the substrate 1 are exposed. After the above sequence of operations, the resist 3 on the substrate 1 is developed; thus, the portions of the negative type resist 3 which have become insoluble as a result of the exposure to the ultraviolet light are retained and a resist pattern corresponding to the circuit pattern that is to be formed on the printed wiring board is formed on the substrate 1.
However, the above method of exposing printed wiring boards having through holes has a disadvantage. Namely, the amount of exposure of the wall surfaces of the through holes 2 is small compared with the amount of exposure of the planar surfaces of the substrate 1. When the thickness of the substrate 1 is 1.6 mm and the diameter of the through holes 2 is 0.4 mm, the ratio, Wt/Ws, of the exposure, Wt, of the wall surfaces of the through holes 2, to the exposure, Ws, of the plane surfaces of the substrate 1, varies as shown in FIG. 2 as a function of the divergence angle .theta. of the ultraviolet light 8; in FIG. 2, the exposure ratio Wt/Ws is plotted in percent (%) along the ordinate while the irradiation divergence angle .theta. of the ultraviolet light 8 is plotted along the abscissa. As shown in FIG. 2, in the case where the angle .theta. is within a commonly employed range of about 30 to 40 degrees, the exposure ratio Wt/Ws is about 20%. Thus, the amount of exposure Wt of the wall surfaces of the through holes 2 is small compared with the amount of exposure Ws of the plane surfaces of the substrate 1. It is impossible, however, to selectively increase the level of exposure of the wall surfaces of the through holes 2 while retaining the level of exposure of the planar surfaces of the substrate 1 to an appropriate level. Thus, in order to obtain sufficient exposure on the wall surfaces of the through holes 2, it is necessary to increase the whole exposure level and to set this exposure level in accordance with the condition for obtaining a sufficient exposure level of the wall surfaces of the through holes 2 of the substrate 1. This, however, results in an undesirable increase of the resist pattern width on the planar surfaces of the substrate 1; this fact is clearly shown in FIG. 3, where the relations of the circuit pattern width (plotted in .mu.m along the ordinate) with respect to the level of exposure (plotted along the abscissa in mJ/cm.sup.2) are shown in the three cases where the designed values of the pattern width are 100 .mu.m, 150 .mu.m, and 200 .mu.m, respectively; when the exposure level is in the range (shaded in the figure) in which the exposure level of the through holes is proper, the width of the planar patterns on the substrate 1 is increased by about 20% due to excessive exposure. Thus, the above method of exposure has the disadvantage that high density printed circuit boards with finer circuit patterns cannot be produced with accuracy and reliability.